How to design Low power OR gate by GDI technique

In this video , we show that how we can reduce the number of transistor in CMOS design . we are using GDI technique for reduce the number of transistor . GDI technique is also able for reduce the power consumption of the circuit . In this video we design a OR gate by use GDI technique . We can apply GDI technique in any circuit of the VLSI for reduce the number of transistor and Power consumption of that circuit .