Improved performance of Injection-Locked QPSK Modulator Based on Ring VCO in 130 nm CMOS

ABSTARCT :-

A novel quadrature phase-shift keying (QPSK) modulator that employs injection locking for the phase modulation as well as the phase-locked clock generation is presented. By using the proposed clock gating by and gate on a ring voltage-controlled oscillator (VCO), total power consumption and delay is optimizing .The proposed QPSK modulator was fabricated in a 130 nm CMOS. For improve the performance of the circuit , we can use clock gating . 

 

INDEX TERMS—CMOS, injection locking, modulator, quadrature phase-shift keying (QPSK), ring voltage-controlled oscillator (VCO).

Video explanation 

 In the video we are describing firstly the steps of the tanner tool for remove the warning of S-edit . Then we show the base paper of the QPSK based RING VCO . We describe the circuit of the QPSK based Ring VCO . In the ring VCO circuit there was two phase Q phase and I phase . So we describe both the circuits . Then we design complete circuit in the tanner tool with I phase and Q phase circuit of the QPSK based Ring VCO . Now we describe the circuit of the Ring VCO in the tanner . Show the commands for open the circuit in T spice . We use .power command for show the output power . Now we describe the output waveform of the W edit . then we also describe the power of the paper design QPSK based Ring VCO circuit . 

Now we apply Clock gating for improve the performance of the circuit . We apply the clock gating at the place of the clock . Clock gating will be able to reduce the power consumption of the QPSK based Ring VCO circuit . We explain the circuit of the QPSK based Ring VCO circuit by clock gating  . Then we show the output waveform of the QPSK based ring VCO by clock gating . Output waveform are showing for out0 and out270 . Then we show the power consumption of the proposed clock gating of QPSK based Ring VCO . From the power results we can see that power is reducing from the base paper circuit . 

For see the video :-

 

 

For Buy this project contact us at :- goelrahulgoel@gmail.com

 

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In this video we are giving explanation for some given points

1:- what is VLSI  ?
2:- Transistor level theory for IC design ..

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I describe the meaning of the .tran , .print , .power . In the tanner tool if we want to change the input voltage of the circuit at which it is on , off , we mention in the video .

According to the given process we can reduce the power consumption of the circuit

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Video contain three portions
1:- S edit
2:- T spice
3:- W edit

We write the code also for the output wave from design . In this video inverter cell is design by 130nm .

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In this video , multiplexer is design by verilog code  . in this video we are using behavioral modeling style in verilog for design multiplexer 2:1 . We are working for always , if else statement for design the multiplexer 2:1 . For design the verilog code of multiplexer 2:1 we are using xilinx project navigator . we also show the waveform at modelsim simulator .

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In this video a binary counter verilog code by use xilinx project navigator from  000o to 1111.

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single precision floating point mantissa multiplication :-

In this blog we mention the points for single precision floating point precision mantissa multiplication . For single precision floating point multiplication , we have 32 bit .

In single precision floating point multiplication bits explain are given like below

1:- 23 bits for mantissa
2:- 8 bits for exponent
3:- 1 bit sign

so if we combined  all the bits then total bits will come 32 bit .

In the single precision floating point multiplication also work structure :-

Like we have two numbers

X = 10.5
Y = 10.4

Mantissa of X (Mx)(23 bits ) = 10101000000000000000000

How we can find mantissa ?



We have to find the mantissa for the X number . In the number 10.5 we have to break the number in two parts.

10 (before the point )
.5 (after the point )

firstly we have to find the binary number of the 10 . The binary of the 10 is 1010 .
then we have to find the binary number of .5

.5 * 2  = 1.0

So combined 10.5 decimal number binary is 1010.100000000000000000000

now we have to find the mantissa of 10.5 . so we will shift the point towards left .

1.01010000000000000000000 * 2^3 .

In this 01010000000000000000000 is the mantissa of X of 23 bit .

Mx = 01010000000000000000000

Exponent

Ex(exponent ) :- 127+3(from power of 2 ) = 130 = 10000010 (binary )

Sign

If the umber is positive then sign bit will be 0 else sign bit will be 1 .

according to this

Mx(mantissa of x)= 01010000000000000000000
Ex (exponent of y ) = 10000010
Sx (sign of x) = 0

Y= 10.4
My =  01001100110011001100110
Ey = 10000010
Sy = 0

Now we will multiply both the mantissa numbers for find final mantissa number .

Example :-



For design the mantissa multiplication VHDL program see this video :-

Ez = Ex + Ey - 127

For Sz  =  Sx xor Sy

like this we can implement the single precision multiplication .

For any query , please post your query in comment box . 

voltage change in input and output waveform of tanner

VOLTAGE CHANGE IN INPUT AND OUTPUT WAVEFORM FOR TANNER TOOL 

In the tanner tool when we see the input and output waveform than voltage of the waveform plays a important role . If we want to change the voltage of the circuit for ON and OFF condition then how we can change . In this video we mention the process steps by which we can change the voltage of the voltage source . 

In this video we also explain .power , .print , tran which using for design the code for output waveform . 

CIRCUIT FOR CHANGE THE VOLTAGE 

 Video 

 

CMOS Inverter Based design By Tanner tool

CMOS Inverter Based design By Tanner tool 

In this video you get that how we can design a Inverter by use tanner tool . In this video we mention all the steps for design inverter with waveform .
Video contain three portions
1:- S edit
2:- T spice
3:- W edit

We write the code also for the output wave from design . In this video inverter cell is design by 130nm .

CMOS Inverter design 

For Design of CMOS inverter in tanner see this video

For any query please contact us at    vlsiengitech@gmail.com

Tanner tool installation Guide

Tanner v13.0 Installation Guide

 In this blog we mention that , how we can install the tanner software . In the tanner software basically two types of error will occurs after complete the installation . It is the error as the given in the image .

Fig :- Tanner tool error 

Video :- For install the tanner tool 

For remove the given error , you have do run the calculator and corrector file . The process for remove the error is given in the video . 

For any query please contact us at           vlsiengitech@gmail.com