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Friday 26 December 2014

VLSI sector to generate 75K jobs by 2015

                        The very large-scale integration (VLSI) chip designing segment will generate 75,000 job opportunities in India by 2015, according to JA Chowdary, president, Hyderabad chapter of The Indus Entrepreneurs (TiE).

                        “About 25,000 people are currently employed in the VLSI designing industry in the country. With rapid growth expected in the coming few years, the segment will employ 75,000 people by 2015,” Chowdary told mediapersons at the three-day 25th International Conference on VLSI Design and the 11th International Conference on Embedded Systems, which kicked off in Hyderabad on Monday.

                           Dasaradha R Gude, convener of the conference, said: “Embedded systems market, which is one of the key drivers of Indian research and development (R&D) offshoring and is currently pegged at around $25 billion globally, is growing at a compounded annual growth rate (CAGR) of 16 per cent”.

                          As many as 50 eminent speakers are delivering lectures at the silver jubilee conference with the theme ‘Embedded Solutions for Emerging Markets – Consumer, Energy, Automotive’, in which 450 delegates from around the world are participating.

                          Long-term trends for the semiconductor industry and electronics are robust, driven by engineering excellence and creativity, according to Jaswinder S Ahuja, corporate vice-president and managing director of Cadence Design Systems in India.

                         Delivering his keynote at the conference, Ahuja said with ‘killer apps’ driving innovation, mobility will become the norm. “Today, apps drive the industry. This trend is here to stay,” he said, adding that systems companies would now require semiconductor companies to deliver application-driven hardware-software platforms.

Tuesday 23 December 2014

5 reasons why VLSI is the answer for a great career

MediatTek, a Taiwan based chipmaker, is ready to set up its new Research & Development (R&D) facility in Bangalore and has already earmarked $200 million investment in the country over a period of next few years. News reports also suggests that it plans on hiring 100 professionals from IC industry and extend that number to 500 over the in the coming years.
 It was long ago when chip design industry put its foot in the Indian market, and since then it has been growing at a rate faster than our national GDP.
If you are an electronics student, still unable to figure out where to go, and deeply interested in technology, chip design is your answer. But if you are still skeptical, here are 5 reasons which will purge all your doubts:

1.  VLSI industry is the future of Indian electronics industry
Two new fabrication plants are to be set up in India by the year 2017. That means, in 4 years time, you will be seeing ICs and chips in your PCs and machines with ‘Made in India’ inscribed on them.
If you are the kind of person who goes by number, Indian electronics manufacturing industry is growing at a rate that is almost double the national GDP. And governments is pushing hard to implement National Policy on Electronics (NPE 2011) which aims at creating 28 million job opportunities in ESDM sector.

2.  Indian VLSI industry is already short of workforce
VLSI courses are still outdated in most of our Indian universities, and even such courses are taught in or around last two semesters. Naturally, the demand of chip design industry is outstrips supply being provided by Indian institutions.
IITs and NITs together satisfy only 25% of the job requirement in chip design industry. And rest of the Indian universities and colleges are unable to meet this need.

3.  It’s a world of electronics engineer
Think about how almost all engineering students have turned their face away from their core industry, except, of course, computer science students. And there is a reason for it; IT has been the only career option for a long time for all engineering undergraduates. I have seen civil engineering students being hired by IT companies.
But VLSI is a world of electronics engineers. It is our world. You are not competing here with any other branch of engineering. Given the number of job availability, in present as well as in future, there is no doubt, with a certain skill set, you will make a great career in chip design industry.

4.  Wider scope for growth
One of the speakers at 26th VLSI design conference in Pune said in a good mood, “In future, I think only verification engineers will be able to afford an apartment in Mumbai.”
Unlike other industries of electronics sector, VLSI design offers a wider scope for development and growth. After an experience of just 2-3 years, the salary could be seen skyrocketing. VLSI design is as rewarding as it is challenging.

5.  There are government jobs too
As an Indian, our affinity for government jobs will never recede (you know what I mean). Of course, DRDO, ISRO and other institutions hire for research and/or as scientists.
But ever looked in your own colleges and enumerated faculty strength? When Delhi University and IITs are managing with ad-hoc teachers, you can estimate the faculty condition in other colleges too. College faculty is already short and there is a desperate need for teachers proficient in VLSI design.


For this blog please give your comments also . 

Thursday 18 December 2014

Research Engineer - Electronics Design

Research Engineer - Electronics Design

Siemens Technology India - India - Bengaluru

Job description

Title : Research Engineer - Electronics Design

Job ID : 151217

Location : Bangalore, India

Organization: Corporate Technology http://www.siemens.com/corporate-technology/en/index.php

Mode of employment: Full time

Introduction

With over 1,900 research operatives worldwide, the Corporate Technology department ( www.ct.siemens.com ) occupies a special position within Siemens' R&D facilities. It functions as an international network of expertise and as a global partner for technology and innovations. Through its R&D activities in Germany, the USA, China, India, Russia, Japan and Eastern Europe Corporate Technology helps secure the company's technological future and bolster its competitiveness.

Corporate Technology’s Research and Technology Center is at the heart of Siemens R&D. Its strong technology base makes it a strong in-house partner for innovation. We develop technologies with wide applicability for the Siemens Divisions and help them to successfully bring innovations to market. Our about 1,800 scientists at locations in North America, Europe, and Asia ensure the technological and innovative future of the company.

The Electronics and Embedded Processing group develops electronics and embedded systems using next-generation technologies. The group leverages new and emerging technologies in the field of electronics for efficient cross-sector multi-disciplinary application. The systems developed by the group are typically based on Digital Signal Processors, Field-Programmable Gate Arrays, and general-purpose microcontrollers (including multi-core processors). The group covers all aspects of embedded systems design, ranging from technology scouting and selection, electronic systems design, high-speed mixed-signal circuit board design, debug and test, embedded digital signal processing and application optimization, and low-level firmware development.

What are my responsibilities?

As a Research Engineer in RTC’s Electronics and Embedded Processing Group, you will be required to:

  1. Work as an individual contributor on innovative research projects or critical development projects.
  2. Analyze technical requirements of project goals.
  3. Be a “Hands On Technologist”, with the ability and willingness to translate system level specifications described by relevant stakeholders into working circuits and prototypes.
  4. Test, validate and characterize prototypes.
  5. Generate intellectual property in business-relevant technology areas. Publish research in international well-known journals and conferences.
  6. Design product solutions based on customer requirements.
  7. Take part in other assigned team initiatives from time to time.


What do I need to qualify for this job?

You are required to possess:

  1. A Master’s degree in electronics or related discipline and 1-3 years of relevant experience.
  2. Sound knowledge of microcontroller, DSP, FPGA architectures – You must be capable of selecting and choosing a part (DSP, FPGA, µC) best suited for an application given the requirements for the same.
  3. Good knowledge of various components of an embedded system – memories, RTCs, watchdogs, power sequencing circuits , UARTs, display systems, etc .
  4. Good knowledge of digital design concepts – you must be capable of designing glue logic for interfacing peripheral components with the main processing unit. Awareness of concepts like timing, hazards, race conditions, set up and hold violations, clock skew, jitter, use of FIFOs for buffering and flow control, etc. Awareness of high speed digital design problems.
  5. Sound knowledge of embedded communication protocols and interface methodologies – a good knowledge of embedded serial communication protocols like I2C, SPI and various other peripheral interface options and methods.
  6. Capability of understanding and designing sensor interface and analog signal conditioning circuits. Ability to work with opamps, comparators, voltage references, ADCs & DACs.
  7. Working knowledge of power supply design for embedded systems. In particular, a good understanding of LDOs, stability issues, switched mode DC-DC converters. Awareness of the issues involved in the design of power supplies/distribution networks for digital and low noise analog systems.
  8. Ability to work with schematic capture tools (preferably OrCAD) and circuit simulation tools like Pspice.
  9. Knowledge of signal and power integrity issues at the circuit board level – ringing, cross talk, transmission line effects, decoupling issues, controlled impedance etc., Ability to develop a design that takes these factors into account.
  10. Familiarity with the use of test and measurement equipment like DSOs, LAs, multi-meters, function generators.
  11. A good understanding of the multilayer PCB design process and capability of working with the layout to enable first time right designs and prototypes.
  12. Working knowledge of electronic circuit design using discrete electronic components (BJTs, FETs, diodes, RLC, etc.)
  13. Working knowledge of design for EMC, DFA, DFM, DFT.
  14. Strong circuit building, prototyping and troubleshooting skills.


What else do I need to know?

This job opening involves working on challenging electronic design activities across a variety of domains relevant to Siemens business interests. You will work in a technology focused, domain agnostic environment. You will be required to adapt quickly to new domains and solve design challenges associated with them. You must have excellent communication and technical writing skills. You must work well in a team and should demonstrate clear and focused thinking and action.

Siemens is dedicated to quality, equality, and diversity and we welcome applications that reflect the diversity of the communities within which we work.

Please find more information at: http://www.siemens.com/corporate-technology/en/index.php

We are looking forward to receiving your online application. Please ensure you complete all areas of the application form to the best of you ability as we will use the data to review your suitablity for the role.

Click here for apply 

 

Tuesday 9 September 2014

RTL Design Engineer Texas Instruments - Bangalore, KA

Job Posting Title 

RTL Design Engineer 

Job Description 

Design and implementation of digital IP modules for a low-power family of micro-controllers. The job includes creation of new designs, assuming ownership and enhancement of existing modules, implementation in Verilog and/or VHDL, supporting verification and validation teams, and checking the IP for quality on area, performance and power metrics. The job also requires ensuring that the designs are high quality and free of clock crossing related hazards including, but not limited to, compatibility with analog sub-components from other designers. The candidate will also be required to mentor and support other engineers and will be expected to be able to lead the design and development of IP modules independently with keen focus on quality and schedule.

Apply Now

Thursday 28 August 2014

Online VLSI (Verilog) Project Based Training (03/9/14 )

Online VLSI (Verilog) Project Based Training (03/9/14 ) :-

VLSI EngiTech Pvt. ltd. is a providing 60 days Project training at Verilog . Training will be perform in the evening at the scheduled time .

Benefits from training :-

1:- Complete knowledge of Verilog with projects .
2:- Every participant will get training certificate + project handling certificate after complete training .

Fee :- 1100/- (INR)

Participate student will get daily documentation and video files lectures .

Total seats :- 100

Query session :-

Daily a query session will be organized By skype and gtalk user can talk to us and solves the problem .

Project :-

We will work at many minor and major projects during training session .
Name of some projects

1:- 32 bit floating point multiplication by single precision floating point multiplication
2:- Digital Clock
3:- Advanced Traffic Light control
4:- 16 bit Microprocessor

Please contact us at vlsiengitech@gmail.com or 09649955929 .

For more details visit at :-

http://www.vlsiengitech.com/verilog-online-training

Sunday 17 August 2014

AMS Verification Engineer NXP Semiconductors - Bangalore

Job description

• Define Verification strategies at different Abstraction Levels
• Define and Develop Verification Infrastructure for Mixed Signal Chips
• Develop Verification Test Plan
• Develop Analog models
• Write and execute Test Cases
• Post Silicon Validation
• Develop Core Competence in AMS Verification
• Coach juniors

Desired Skills and Experience

• Verified Analog and Mixed Signal blocks
• Analog Blocks Modeling ( Verilog-A, Verilog –AMS)
• Vehicle Networking knowledge ( CAN,LIN, Ethernet Protocols, Switches)
• Automotive Industry Awareness
• Verilog Expert and basic knowledge of VHDL
• Good Digital Verification experience
• Familiar with HVL like System C, UVM
• Masters/Bachelors in Electronics

Digital Design Intel - Bangalore , KA

Job description

INTERNSHIP DETAILS

Intel is inviting applicantions for its digital design internship programme.

About Intel (http://www.intel.com/):

Intel Corporation is an American multinational semiconductor chip maker corporation headquartered in California. Intel is one of the world's largest and highest valued semiconductor chip makers, based on revenue.It is the inventor of the x86 series of microprocessors, the processors found in most personal computers

About the Internship:

Responsibilities may be quite diverse of an exempt technical nature.

Who can apply:

Candidate should be pursuing masters degree in either Electronics, VLSI, embedded system, or microelectronics from reputed institutes.

Streams: Electronics and Communication Engineering, Microelectronics, VLSI Design and Embedded system
Additional Information:

Please Note: The start date of the internship has not been mentioned in the official post.



Engineer - IC Design Broadcom - Bangalore , KA

Job description





Job Description

.We need motivated and highly experienced design engineers with the ability to carry blocks from concept to silicon. You should have good exposure to micro-architecture, logic design, timing closure and post silicon support activities.
The selected candidates will be responsible for VLSI/Chip Design for 802.11 wireless chips & involves SOC/Phy/MAC Architecture, RTL Design, implementation, Verification, Synthesis, P&R, Timing Closure, STA, low power design for 802.11 wireless chips.

Job Requirements 

The candidate should meet the following requirements.
• 1+ years of experience in frontend VLSI design with BSEE/MSEE
• Experience in micro-architecture/logic design of complex blocks and subsystems, with ability to work with multiple teams to define specification and lead the design effort.
• Experience in Verilog/VHDL design, analysis and verification of DSP functions, Developing block level micro-architecture of DSP blocks from algorithms specified in C
• Expertise in ASIC/FPGA design flows including simulators, functional and code coverage tools, lint/CDC analysis, synthesis, stating timing analysis, power estimation and related tools
• Experience in creating self-generating / self-checking simulation & verification environment using C, HDL, Perl, TCL, Python scripts
• Experience in ARM subsystem, Top-Level Chip Interconnect Architectures, Clocking Scheme, PMU Architecture, Power Topology
• Experience for any of the following domains is desirable - 802.11 WLAN Chip/Phy/MAC designs, or other related wireless technologies
• Should have good documentation/communication skills and be able to work with multi-functional, multi-site teams
• Highly motivated and independent contributor

Country 

India

State/Province 

India Cities

City/Town 

Bangalore

Shift 

1st Shift - Day

Percent of Travel Required 

5% - 10%

Function 

Engineering

Discipline 

IC Design

Alternate Location(s) 

N/A

Design Engineer - SC ARM - Bangalore , KA

Job description

Job Description

Introduction :ARM offers IC designers a wide range of choices from its broad portfolio of standard cell, memory, and I/O products. The ARM product line is optimized for each silicon technology. ARM's Process-Perfect™ Design Methodology includes comprehensive QA and validation procedures that can enable accurate designs with high manufacturing yields. ARM products have been used in circuits running as fast as 2GHz+ and are in production or development at 180nm, 150nm, 130nm, 90nm, 65nm, 45nm, 28nm, 20nm and 14 nm semiconductor processes for various foundries and IDMs.
Our circuit group comprises some of the industry's leading experts in deep submicron circuit design and design for manufacturing (DFM) techniques. This position is a rare opportunity for a digital circuit professional to work with a very successful circuit and layout team. The team has exposure to a wide variety of design rules from leading edge foundries as well as design teams from many of the world's leading developers of digital ICs making for an ideal learning environment.
Job Purpose :The Standard Cell Design Engineer will be responsible for the development of standard cell libraries in a wide variety of different processes targeting all extremes of power, performance, and density. The Standard Cell Design Engineer will work as part of a small team to optimize schematics, develop layout, drive the mask design team, characterize the cells, generate all standard library views, and verify all views by exercising them using a variety of industry standard tool flows.
Accountabilities / Responsibilities :

  • Circuit design of standard cells including traditional logic cells as well as advanced power management cells
  • Verification of functionality, performance & power of developed circuits
  • Characterization of the Cell library
  • Generation of all views delivered with our Physical IP product lines
  • Testing of all views by exercising them in several industry standard design flows
  • Good understanding of layout to effectively drive the mask design team and perform layout development tasks
  • Understanding of deep submicron device physics in order to account for these non-ideal effects during cell design
  • Understanding or an ability to learn a wide variety of industry standard modelling formats including:Liberty (CCS and NLM), Verilog, LEF, Milkyway, Spice, ECSM, and CDB

Education & Qualifications: 

  • Qualified candidates will have a university degree(s) in Electronic Engineering, Computer Engineering or other relevant technical discipline.
  • Experience developing or utilizing standard cell libraries.


Job Requirements 

Essential Skills & ExperienceSpecifically, candidates should have:


  • An understanding of MOSFET electrical characteristics
  • An understanding of power, performance, and area tradeoffs
  • Understanding of layout at the transistor level
  • Understanding of Design For Manufacturability (DFM) layout techniques
  • Experience with transistor level circuit simulators
  • Experience with Schematic and Layout Capture: Cadence schematic or equivalent.
  • Experience with backend verification tools: DRC, LVS (HERCULES, CALIBRE, ICV)
  • Experience with LEF and Milkyway view formats
  • Understanding of extraction methodologies and limitations
  • Diagnostic skills for tools and resultant reports
  • Knowledge of shell/tcl/Perl scripting
  • Basic Source control management with tool such DesignSync

Skills & ExperienceOther relevant skills include:

  • Modeling Languages: Verilog, VHDL.
  • Basic Experience with EDA tools such as Design Compiler, PrimeTime, Modelsim, EDIS, ICC, Talus
  • An understanding of transistor level device physics
  • Understanding and preferably experience with transistor level design of static circuits including state retaining elements like latches and flops

Interpersonal Skills: It is essential for the successful applicant to:

  • Co-operate & communicate well with library development team
  • Proficient in English with good communication skills, oral and written
  • Be motivated to continuously develop skills and accept a variety of responsibilities as part of contributing to the design center's success
  • Demonstrate a positive attitude and respect for all members of the team
  • Be willing to iteratively improve designs and repeatedly attempt to develop solutions to difficult problems

Memory Design Engineer 3D-IP Semiconductors - Bengaluru Area, India

Job description

For our Memory team we are hiring candidates with 3-8 years' experience in Memory DevelopmentThe role is Memory Architecture Design and Characterization in advance process technology nodes (65nm/45nm/28nm and lower process technologies )
Below are the details of  the position:
  • Designation : Design Engg/Senior Design Engg/Team Leader
  • Experience :  3-8 years' in Memory Development (SRAM/FLASH)
  • Qualification : B.E/B.Tech/M.Tech/M.S/M.E in VLSI, Electrical or Electronics Engineering
  • Location : Bangalore

Desired Skills and Experience

  1. Memory Architect
  • 3-8 years' experience in the development of SRAM Memory Compilers, embedded Flash Memory
  • Expertise in Memory Architecture design, Critical Path schematic design, Sense Amplifier design, BitCell design.
  • Experience in latest process nodes such as 28nm and lower.  
  • Knowledge of Timing, Marginalities, Low power issues is a must
  • Knowledge of layout issues in different Memory architectures
  • Knowledge of Cadence/Synopsys/Mentor EDA tools is a must
  • Knowledge of scripting languages such as Shell, Peril is a plus
       2.  Memory Characterization
  • 3-8 years' experience in the development of SRAM Memory Compilers
  • Hands on experience in Memory Characterization for latest process technology nodes (65nm/45nm/28nm) 
  • Expertise in writing Timing definitions(setup, hold, cycle times, etc.) and Marginalities
  • Hands on experience in generating and verification of views such as.LIB, VITAL, LEF, etc.
  • Knowledge of Perl/Shell Programming is a plus

Mixed Signal SOC Integrator NXP Semiconductors - Bangalore

Job description

•Responsible for  Analog Mixed signal Chip Level Integration
•Digital and Analog IP Integration  in Mixed Signal Designs
•Top level Dft Infrastructure and tool flow
•Functional and Test IO Muxing
•DfT insertion and validation
•Develop basic test cases for ensuring RTL Integrity
•Automation for Integration
•Strong understanding of Revision Control tools and Configuration Management
•experience with Design database management (collabnet, Synchronisity or likewise)
•release strategy Way of Working, tagging etc
•IP incoming inspections
•RTL Quality Checks using  Lint, CDC  etc
•RTL Synthesis, Constraints development
•Equivalence Checking
•supporting Backend/Physical design
•Power analysis
•Contribute in audits/reviews and work with team and Chip Architect & PM to achieve timely and high quality deliverables

Desired Skills and Experience

•Greater than 10  years of   Relevant experience  with at least 3 years of experience as  Chip  Integration Lead
•Experience in Integrating Complex Mixed Signal Chips
•In-depth Understanding  of  Mixed Signal Chips  architecture
•Strong Coding skills in VHDL and  Verilog
•Preferably experienced with Cadence tooling,
•Synthesis at Chip Level,
•Worked with multi-power domain designs and experience with low power methodologies and flows
•Scan Insertion
•Good Knowledge  of DFT , Mentor DfT tools
•  Synthesis and PT- SI timing analysis for complex blocks and working through timing ECO fixes
•Worked on RTL and gate-level simulations and debug.
•Worked with multi clock, rail and high speed designs.
•Worked with physical design team for timing closure.
•Bring in some unique expertise

Business Development Engineer Global Marketing Services, India - Bengaluru Area, India

Job description

         
         
         
The job involves understanding semiconductor and microelectronic fabrication and assembly processes and discuss with prospective customers to match their requirements with the tools and materials we offer. The candidate main objective is to win business and would be required to demonstrate and install simple equipments like to photoresist spinners, thickness measurement tools, etc as and when required. The candidate should be ready to travel to any location in India and also travel to Vendor's location outside for product training if required.

Desired Skills and Experience

         
         
         
Prefer candidates with BE or ME in Electronics with a specialization in Microelectronics or VLSI. Candidates with prior experience in selling semiconductor process tools would be preferred but not a must. Candidates must have knowledge on electronic circuits assembly and hands on experience would be preferred. Candidates with some past experience in selling and especially to govt institutes would be given preference.


ASIC / VLSI - Staff Engineer, Timing & Synthesis Semtech - Bhubanswar

Job description

Responsibilities:

Candidate will be responsible for synthesis & STA setup, full chip timing analysis, timing eco closure. Responsibilities also include supporting backend design team to tape out of the full chip. Candidate should also possess excellent communication skills to interact with external customers and cross site teams within company. Candidate will get an opportunity to work in RTL development and micro-architecture of digital blocks

Desired Skills and Experience

Requirements:
  • Expertise in Synthesis, Static timing analysis and Equivalence
  • Checking (LEC) using synopsys/cadence tools.
  • Experience in timing constraints development & validation is a must.
  • Experience in developing & validating the functional & test-mode timing constraints is also must.
  • Familiarity with ASIC design flows for deep sub-micron technologies. 40nm and 28nm will be preferable. 
  • Knowledge of DFT/ATPG/MBIST will be a plus point.
  • Any exposure to Synopsys Lynx flow will be preferable.
  • Knowledge of RTL design and functional simulation will be preferable.

Senior Application Engineer DFT - 2736 Mentor Graphics - Bangalore , KA

Job description

Description

Company: Mentor Graphics
Job Title: Senior Application Engineer DFT - 2736
Job Location: India - Bangalore
Job Category: Sales 


Job Duties: 
1. As part of the customer support team, help grow customer satisfaction with Mentor’s DFT tools by helping them successfully deploy Automatic Test Pattern Generation (ATPG) and Built In Self-Test (BIST) tools (such as Fastscan, TestKompress, MemoryBIST, LogicBIST, BoundaryScan, SOCScan).

2. Work on service requests to deliver excellent technical support in a timely manner to Mentor’s customers

3. Recognize and communicate potential business opportunities to support the growth of Mentor’s business

4. Work collaboratively with field applications engineers, account teams and engineering to successfully deploy Mentor’s products and services

5. Some Travel would be required in this position.

6. Help the account team in growing the business by increasing adoption of Mentor DFT technology at customers.

7. Deliver training on Mentor’s DFT tools and flows to customers

Job Qualifications: 
1. As a member of the technical sales team, you will contribute to our success by helping customers deploy Mentor’s DFT tools efficiently. This is a challenging position that will assist in growing the DFT business in India. You will workclosely with customers as well as field applications and engineering teams.

2. Need excellent communication and problem solving skills, program management skills, hands-on and a self-starter, able to work independently but still build relationships withManagers and with customers.

3. Knowledge and experience with VLSI design, HDL Synthesis, VLSI Testing and design for testability.

4. Experience with design, simulation, verification of ASIC/VLSI circuits and systems, design verification and product test generation preferred. In-depth understanding of Design for Test (DFT) structures is required. This includes scan based testing, Memory BIST, Logic BIST, and Boundary Scan (1149.1). Knowledge of scan data compression methodologies is required.

5. Preferred experience in specific areas: Operating Systems: UNIX, Linux, Sun Solaris.

Languages: Verilog (Behavioral, RTL, gate level), VHDL (Behavioral, RTL, gate level), Perl, C/C++.

CAD Tools: Synthesis, Simulation, ATPG, Memory BIST, Logic BIST, Boundary Scan. Familiarity with Logic BIST flows and methodologies is a plus.

6. Three to ten years of design experience in DFT solution implementation, and a good understanding of backend design. Experience in Memory BIST and Logic BIST implementation will be a big plus.

7. Education: Bachelors in Electrical Engineering (min). Masters in Electrical Engineering is a plus

SENIOR PHYSICAL DESIGN ENGINEER NVIDIA - Bangalore , KA

Job description



SENIOR PHYSICAL DESIGN ENGINEER

Job ID

1687219

Location

India, Bangalore

Description

SENIOR PHYSICAL DESIGN ENGINEER #1687219

RESPONSIBILITIES:
- Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation, and mobile markets
- Participating in establishing physical design methodologies, flow automation, chip floorplan, power/clock distribution, chip assembly and P&R, timing closure
- Working on static timing analysis, power and noise analysis and back-end verification

MINIMUM REQUIREMENTS:
- BSEE, MSEE preferred
- 4+ years of experience in large VLSI physical design implementation on 40nm, 28nm or 20nm technology
- Successful track record of delivering designs to production is a must
- Experience leading small teams (3-5) is a plus
- Should be a power user of P&R and timing analysis CAD tools from Synopsys (ICC/DC/PT/STAR-RC), Cadence (First Encounter)
- Understanding of custom macro blocks such as RAMs, CAMs, high-speed IO drivers
- Prior experience in timing closure, clock/power distribution and analysis, RC extraction and correlation, place/ route and tapeout solutions
- Proficiency using Perl, Tcl, Make scripting is preferred

TEST ENGINEER HCL Technologies - Bangalore , KA

Job description



Job Description (Posting).

To test the VLSI Code as per work allocated within the quality standards prescribed so as to meet the product requirements

Experience 

3-5 Years

Qualification 

BE/BTech

No. of Positions 

0

Skill (Primary) 

Technical Skills-Hardware & ASIC-VHDL

Removal Date 

14-Oct-2014

MASK DESIGN ENGINEER- Full-custom Layout SanDisk - Bengaluru Area, India (1-3 yr exp)

Job description


Experience : 1 to 3 Years

Good Understanding of Basic VLSI Concepts
Good understanding of CMOS process
Knowledge of Verification tools (DRC/LVS tools like Hercules, Assura, Calibre etc...)
Experience in Cadence Platform (layout/layoutXL)
Knowledge of layout concepts like Matching, shielding, Symmetry, ESD, latch-up, Reliability and DFM
Understanding of Standard cell/Macro development
Scripting knowledge a plus: PERL and SKILL
Good communication skills

Desired Skills and Experience


Standard cell/Macro development
Support block layouts like Charge Pumps, IO_PADS, Reference generators and other analog blocks of NAND chip
Person will be working with our India and US physical design teams for all tasks

Asic Design Engineer Avago Technologies - IN-KA-Bangalore

Job description

VLSI Technical engineer with 6-10 years of experience in RTL Design Activities 



He/she should have strong knowledge of following 

Ø Verilog RTL/System Verilog coding 

Ø SoC integration flows ( integrating multiple IPs and associated, Understanding of Power Management ( voltage domain, power domains, clock domains ) 

Ø Synthesis ( DC ) and Timing Concepts

Ø Spyglass ( lint, DFT, PM, CLK/RST, CDC) 

Ø Formal Verification( LEC) 

Ø Perl scripting 

CAD Tools : Synopsys 



Domain : Ethernet ,PICe or any networking protocol 



Education Qualification/Yr of experience: Bachelors/Master’s in Electronics/Computer Engg 


Qualifications
Education Qualification/Yr of experience: Bachelors/Master’s in Electronics/Computer Engg