Job description
Job Description
.We need motivated and highly experienced design engineers with the ability to carry blocks from concept to silicon. You should have good exposure to micro-architecture, logic design, timing closure and post silicon support activities.
The selected candidates will be responsible for VLSI/Chip Design for 802.11 wireless chips & involves SOC/Phy/MAC Architecture, RTL Design, implementation, Verification, Synthesis, P&R, Timing Closure, STA, low power design for 802.11 wireless chips.
Job Requirements
The candidate should meet the following requirements.
• 1+ years of experience in frontend VLSI design with BSEE/MSEE
• Experience in micro-architecture/logic design of complex blocks and subsystems, with ability to work with multiple teams to define specification and lead the design effort.
• Experience in Verilog/VHDL design, analysis and verification of DSP functions, Developing block level micro-architecture of DSP blocks from algorithms specified in C
• Expertise in ASIC/FPGA design flows including simulators, functional and code coverage tools, lint/CDC analysis, synthesis, stating timing analysis, power estimation and related tools
• Experience in creating self-generating / self-checking simulation & verification environment using C, HDL, Perl, TCL, Python scripts
• Experience in ARM subsystem, Top-Level Chip Interconnect Architectures, Clocking Scheme, PMU Architecture, Power Topology
• Experience for any of the following domains is desirable - 802.11 WLAN Chip/Phy/MAC designs, or other related wireless technologies
• Should have good documentation/communication skills and be able to work with multi-functional, multi-site teams
• Highly motivated and independent contributor
Country
India
State/Province
India Cities
City/Town
Bangalore
Shift
1st Shift - Day
Percent of Travel Required
5% - 10%
Function
Engineering
Discipline
IC Design
Alternate Location(s)
N/A
