multiplexer design by Xilinx with verilog code

In this video , multiplexer is design by verilog code  . in this video we are using behavioral modeling style in verilog for design multiplexer 2:1 . We are working for always , if else statement for design the multiplexer 2:1 . For design the verilog code of multiplexer 2:1 we are using xilinx project navigator . we also show the waveform at modelsim simulator .